The ideal candidate will have following skills and background:
- M.Sc.EE or equivalent degree in Electronics, Computer Science, Automatic or Telecommunications
- Highly motivated and dynamic engineer able to adopt new technology quickly
Additional skills that would be a plus are:
- Familiar with scripting tools and languages (e.g. bash, csh, awk, Perl)
- Familiar with software/hardware development tools (e.g. make and versioning tools (e.g. CVS/SVN)
- Knowledge of C/C++
Your key responsibilities:
- You will be part of the team working on the high-speed multi million gates IP and SoC design using VHDL and/or Verilog
- You will be responsible for RTL development, , timing closure, synthesis, physical implementation and physical verification
- The position requires a close working with the different hardware and software engineering teams
The candidate must have the knowledge and the interpersonal skills to be able to fit into very focused group of people working on very complex product development.
- Comprehensive trainings for Juniors from experts for design/analog/verification of ASIC/FPGA System-on-Chip
- Permanent employment and additional benefits
- Additional private insurance
- Opportunity to develop soft skills through series of trainings
- Opportunity to be part of many sports activities with colleagues
- Opportunity to travel abroad and work on our clients sites
- Working in young and enthusiastic team
Successful training completion and testing will be condition for candidates to join larger team working in all stages of complex SoC design and verification.
For all candidates proficient knowledge of UNIX/Linux and fluent English is a prerequisite!