HDL Design House Announces PCS IP Core

  • March 12, 2013

Belgrade, Serbia – March 12th, 2013 – HDL Design House, provider of high performance digital and analog IP cores and SoC design and verification services, has announced availability of its Physical Coding Sublayer (PCS) IP core (HIP 500) which enables…

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HDL Design House Introduces MIPI CSI-2 Transmitter IP core

  • December 7, 2012

Belgrade, Serbia – December 7th, 2012 – HDL Design House, provider of high performance digital and analog IP cores and SoC design and verification services, today announced availability of MIPI CSI-2 Transmitter (HIP 3900), digital core that is compliant with…

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