uVC/Verfication Products
I2C uVC
The I2C uVC emulates the behavior of an I2C interfaced core and has two applications: 1) verification
of a single device with an I2C interface, or 2) verification of a system with multiple I2C -compatible devices.
Product Code Name
HDH 3000 |
Datasheet
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Serial RapidIO uVC
The SerialRapidIO uVC emulates the behavior of an
SerialRapidIO interfaced core and has two applications:
1) verification of a single device with an SerialRapidIO interface,
or
2) verification of a system with multiple SerialRapidIO -compatible
devices.
Product Code Name
HDH 5000 |
Datasheet
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ATA/ATAPI-8 uVC
HDL Design’s ATA/ATAPI-8 UVC is a reusable Universal
Verification Component (UVC) based on Cadence Design’s
Specman-Elite tool and Universal Reuse Methodology (URM). The component specifies the AT
Attachment Interface between host systems and storage devices, providing a common attachment
interface for systems manufacturers, systems integrators, and suppliers of intelligent storage
devices.
The ATA/ATAPI-8 UVC includes the Packet Command feature known as the AT Attachment Packet
Interface (ATAPI) and maintains a high degree of compatibility with the AT Attachment-8 with
Packet Interface (ATA/ATAPI-8). Configurable and easy-to-use, the ATA/ATAPI-8 UVC integrates easily
into complex verification environments to speed the development of testing tools, reduce verification
costs and shorten time-to-production of new SoCs.
Product Code Name
HDH 2100 |
Datasheet
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Serial ATA protocol uVC
The Serial ATA uVC can be used to verify the IP core containing either a host or one or more devices. Developed using u Reuse Methodology (uRM), the Serial ATA uVC speeds model-level and SoC verification by ensuring the Serial ATA protocol is effective as a high-speed serial link that replaces parallel ATA interfaces connecting mass storage devices.
Product Code Name
HDH 2000 |
Datasheet
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Serial Attached SCSI (SAS) uVC
The Serial Attached SCSI (SAS) interface was developed to address the anticipated I/O and direct attach storage
requirements of the future. It provides a universal interconnect with Serial ATA (SATA) functionality, while offering logical SCSI compatibility,
reliability, performance and manageability. The SAS uVC can be used to verify an IP core with one or more SAS ports, both initiator and
target.
Product Code Name
HDH 7000 |
Datasheet
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PCI uVC
The PCI uVC implements the behavior of an PCI interfaced core and has two applications:
1) verification of a single device with an PCI interface, or
2) verification of a system with multiple PCI compatible devices.
Product Code Name
HDH 12000 |
Datasheet
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PCI-X uVC
The PCI-X uVC implements the behavior of an PCI-X interfaced core and has two applications:
1) verification of a single device with an PCI-X interface, or
2) verification of a system with multiple PCI-X compatible devices.
Product Code Name
HDH 13000 |
Datasheet
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LPC uVC
HDL Design’s LPC uVC emulates the behavior of an LPC interfaced core and has two applications:
1) verification of a single device with an LPC interface, or
2) verification of a system with multiple LPC-compatible devices.
Product Code Name
HDH 16000 |
Datasheet
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SMBus uVC
The SMBus u-language Verification Component (uVC) emulates the behavior of an SMBus device. It can be used
to verify a single device containing an interface to an SMBus or a system with multiple SMBus-compatible devices.
Product Code Name
HDH 10000 |
Datasheet
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PMBus uVC
The PMBus UVC is fully configurable and easy to use in both module and system-level verification. It can be configured to emulate a single Master, Slave or Master-Slave device.The PMBus UVC is fully URM (Cadence Universal Reuse Methodology) compliant with a standard structure and user interface, and therefore easy to use and configure.
Because it is URM-compliant, the PMBus UVC can be easily combined with other URM-compliant UVCs to construct an verification environment.
The PMBus UVC is designed to be the basis of a verification environment for either a single PMBus device or multiple PMBus
Product Code Name
HDH 11000 |
Datasheet
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HyperTransport uVC
HyperTransport (HDH 1000) uVC environment can be used in module level verification. In those
test environments, each DUT link interface is connected to an uVC link interface of appropriate kind.
Multiple instances of HyperTransport uVCs can be used in cooperation to verify complex SoC designs such as HyperTransport trees and architectures with multiple HOSTs or multiple HyperTransport chains.
Product Code Name
HDH 1000 |
Datasheet
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SPI-4 uVC
The SPI-4 UVC allows verification of SPI-4 master/slave core and SPI-4 UVC can be used in following applications:
1) verification of a single device with an SPI-4 interface, or
2) verification of a system with multiple SPI-4-compatible devices.
Product Code Name
HDH 15000 |
Datasheet
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JTAG uVC
The JTAG uVC implements the JTAG protocol as defined in the IEEE1149.1 standard. The JTAG uVC is used to verify
a device containing a JTAG interface. The component can be easily integrated to rapidly create sophisticated verification environments
for complex SoCs.
Product Code Name
HDH 6000 |
Datasheet
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CompactFlash and CF+ uVC
The CompactFlash and CF+ uVC is an u-language verification component that implements the behavior of CF+ and
CompactFlash storage cards defined in the CF+ and CompactFlash Specification Revision 3.0. The CF uVC is used to verify a device containing
a CF+ or CompactFlash storage card controller. Easy to use and configure, the component is fully uRM-compliant with a standard structure
and user interface.
Product Code Name
HDH 9000 |
Datasheet
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